FPGA Programming - High Level Synthesis Course
This course is an introduction to FPGA programming using High Level Synthesis (HLS) tools. It is based on the Xilinx Vitis tool. It is a course that I plan to keep updating and improving over time, so the material is not yet complete. I will add more content and exercises in the future, so the following material is a latest snapshot of the course. There is also an Associated GitHub repository with the course material and exercises.
The material has been used in the following occasions:
| Date | Event | Location | GitHub Tag |
|---|---|---|---|
| 2026/06/15 - 2026/06/16 | PhD Course: FPGA Programming - High Level Synthesis module | University of Milano Bicocca | 2026-unimib |